Alchitry Cu V2

Alchitry Cu V2Note that the Lattice FPGA requires a license for iCEcube2. This is free for hobbyists. Scroll to the bottom of this page for current details. If you're looking for the original Cu, click here. Features ICE40HX8K CB132 FPGA 79 3. 3V IO pins broken out across two headers Control Header 8 IO pins also connected to on board LEDs 1 IO pin also connected to on board reset button Configuration SPI signals Raw power input 3. 3V regulated output QWIIC

8V) pins (16 pairs) capable of LVDS_25 IO

25 Gb/s bandwidth per pair

XC7A35T-2FTG256I FPGA (speed and temperature grade upgrade over Au V1)

2A (VCCAUX

3V IO pins broken out across two headers

This requires that the mating board is clear of components under the Pt

The Pt was designed so that no components on the bottom are taller than 1

Check out the all new Alchitry Pt

The bottom pinout is the same between models

256MB DDR3L @ 800Mb/s (400MHz)

Remaining IO is at 3

This is your chance to snag a killer deal on a Pt from the first batch if you're willing to deal with some of its quirks